458 lines
13 KiB
C
458 lines
13 KiB
C
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/******************************************************************************
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*
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* Copyright(c) 2007 - 2017 Realtek Corporation.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of version 2 of the GNU General Public License as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* The full GNU General Public License is included in this distribution in the
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* file called LICENSE.
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*
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* Contact Information:
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* wlanfae <wlanfae@realtek.com>
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* Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
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* Hsinchu 300, Taiwan.
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*
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* Larry Finger <Larry.Finger@lwfinger.net>
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*
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*****************************************************************************/
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/*************************************************************
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* include files
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************************************************************/
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#include "mp_precomp.h"
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#include "phydm_precomp.h"
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/**************************************************
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* This function is for inband noise test utility only
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* To obtain the inband noise level(dbm), do the following.
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* 1. disable DIG and Power Saving
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* 2. Set initial gain = 0x1a
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* 3. Stop updating idle time pwer report (for driver read)
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* - 0x80c[25]
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*
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*************************************************/
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void phydm_set_noise_data_sum(struct noise_level *noise_data, u8 max_rf_path)
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{
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u8 i = 0;
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for (i = RF_PATH_A; i < max_rf_path; i++) {
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if (noise_data->valid_cnt[i])
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noise_data->sum[i] /= noise_data->valid_cnt[i];
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else
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noise_data->sum[i] = 0;
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}
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}
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#if (ODM_IC_11N_SERIES_SUPPORT)
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s16 odm_inband_noise_monitor_n(struct dm_struct *dm, u8 is_pause_dig, u8 igi,
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u32 max_time)
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{
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u32 tmp4b;
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u8 max_rf_path = 0, i = 0;
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u8 reg_c50, reg_c58, valid_done = 0;
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struct noise_level noise_data;
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u64 start = 0, func_start = 0, func_end = 0;
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s8 val_s8 = 0;
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func_start = odm_get_current_time(dm);
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dm->noise_level.noise_all = 0;
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if (dm->rf_type == RF_1T2R || dm->rf_type == RF_2T2R)
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max_rf_path = 2;
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else
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max_rf_path = 1;
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PHYDM_DBG(dm, DBG_ENV_MNTR,
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"odm_DebugControlInbandNoise_Nseries() ==>\n");
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odm_memory_set(dm, &noise_data, 0, sizeof(struct noise_level));
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/* step 1. Disable DIG && Set initial gain. */
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if (is_pause_dig)
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odm_pause_dig(dm, PHYDM_PAUSE, PHYDM_PAUSE_LEVEL_1, igi);
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/* step 3. Get noise power level */
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start = odm_get_current_time(dm);
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while (1) {
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/* Stop updating idle time pwer report (for driver read) */
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odm_set_bb_reg(dm, REG_FPGA0_TX_GAIN_STAGE, BIT(25), 1);
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/* Read Noise Floor Report */
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tmp4b = odm_get_bb_reg(dm, R_0x8f8, MASKDWORD);
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/* update idle time pwer report per 5us */
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odm_set_bb_reg(dm, REG_FPGA0_TX_GAIN_STAGE, BIT(25), 0);
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ODM_delay_us(5);
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noise_data.value[RF_PATH_A] = (u8)(tmp4b & 0xff);
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noise_data.value[RF_PATH_B] = (u8)((tmp4b & 0xff00) >> 8);
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for (i = RF_PATH_A; i < max_rf_path; i++) {
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noise_data.sval[i] = (s8)noise_data.value[i];
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noise_data.sval[i] /= 2;
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}
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for (i = RF_PATH_A; i < max_rf_path; i++) {
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if (noise_data.valid_cnt[i] >= VALID_CNT)
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continue;
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noise_data.valid_cnt[i]++;
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noise_data.sum[i] += noise_data.sval[i];
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PHYDM_DBG(dm, DBG_ENV_MNTR,
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"rf_path:%d Valid sval=%d\n", i,
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noise_data.sval[i]);
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PHYDM_DBG(dm, DBG_ENV_MNTR, "Sum of sval = %d,\n",
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noise_data.sum[i]);
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if (noise_data.valid_cnt[i] == VALID_CNT)
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valid_done++;
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}
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if (valid_done == max_rf_path ||
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(odm_get_progressing_time(dm, start) > max_time)) {
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phydm_set_noise_data_sum(&noise_data, max_rf_path);
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break;
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}
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}
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reg_c50 = (u8)odm_get_bb_reg(dm, REG_OFDM_0_XA_AGC_CORE1, MASKBYTE0);
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reg_c50 &= ~BIT(7);
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val_s8 = (s8)(-110 + reg_c50 + noise_data.sum[RF_PATH_A]);
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dm->noise_level.noise[RF_PATH_A] = val_s8;
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dm->noise_level.noise_all += dm->noise_level.noise[RF_PATH_A];
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if (max_rf_path == 2) {
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reg_c58 = (u8)odm_get_bb_reg(dm, R_0xc58, MASKBYTE0);
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reg_c58 &= ~BIT(7);
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val_s8 = (s8)(-110 + reg_c58 + noise_data.sum[RF_PATH_B]);
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dm->noise_level.noise[RF_PATH_B] = val_s8;
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dm->noise_level.noise_all += dm->noise_level.noise[RF_PATH_B];
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}
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dm->noise_level.noise_all /= max_rf_path;
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PHYDM_DBG(dm, DBG_ENV_MNTR,
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"noise_a = %d, noise_b = %d, noise_all = %d\n",
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dm->noise_level.noise[RF_PATH_A],
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dm->noise_level.noise[RF_PATH_B], dm->noise_level.noise_all);
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/* step 4. Recover the Dig */
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if (is_pause_dig)
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odm_pause_dig(dm, PHYDM_RESUME, PHYDM_PAUSE_LEVEL_1, igi);
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func_end = odm_get_progressing_time(dm, func_start);
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PHYDM_DBG(dm, DBG_ENV_MNTR, "end\n");
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return dm->noise_level.noise_all;
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}
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#endif
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#if (ODM_IC_11AC_SERIES_SUPPORT)
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s16 phydm_idle_noise_measure_ac(struct dm_struct *dm, u8 pause_dig,
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u8 igi, u32 max_time)
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{
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u32 tmp4b;
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u8 max_rf_path = 0, i = 0;
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u8 reg_c50, reg_e50, valid_done = 0;
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u64 start = 0, func_start = 0, func_end = 0;
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struct noise_level noise_data;
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s8 val_s8 = 0;
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func_start = odm_get_current_time(dm);
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dm->noise_level.noise_all = 0;
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if (dm->rf_type == RF_1T2R || dm->rf_type == RF_2T2R)
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max_rf_path = 2;
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else
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max_rf_path = 1;
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PHYDM_DBG(dm, DBG_ENV_MNTR, "%s==>\n", __func__);
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odm_memory_set(dm, &noise_data, 0, sizeof(struct noise_level));
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/*Step 1. Disable DIG && Set initial gain.*/
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if (pause_dig)
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odm_pause_dig(dm, PHYDM_PAUSE, PHYDM_PAUSE_LEVEL_1, igi);
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/*Step 2. Get noise power level*/
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start = odm_get_current_time(dm);
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while (1) {
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/*Stop updating idle time pwer report (for driver read)*/
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odm_set_bb_reg(dm, R_0x9e4, BIT(30), 0x1);
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/*Read Noise Floor Report*/
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tmp4b = odm_get_bb_reg(dm, R_0xff0, MASKDWORD);
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/*update idle time pwer report per 5us*/
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odm_set_bb_reg(dm, R_0x9e4, BIT(30), 0x0);
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ODM_delay_us(5);
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noise_data.value[RF_PATH_A] = (u8)(tmp4b & 0xff);
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noise_data.value[RF_PATH_B] = (u8)((tmp4b & 0xff00) >> 8);
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for (i = RF_PATH_A; i < max_rf_path; i++) {
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noise_data.sval[i] = (s8)noise_data.value[i];
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noise_data.sval[i] = noise_data.sval[i] >> 1;
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}
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for (i = RF_PATH_A; i < max_rf_path; i++) {
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if (noise_data.valid_cnt[i] >= VALID_CNT)
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continue;
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noise_data.valid_cnt[i]++;
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noise_data.sum[i] += noise_data.sval[i];
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PHYDM_DBG(dm, DBG_ENV_MNTR, "Path:%d Valid sval = %d\n",
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i, noise_data.sval[i]);
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PHYDM_DBG(dm, DBG_ENV_MNTR, "Sum of sval = %d\n",
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noise_data.sum[i]);
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if (noise_data.valid_cnt[i] == VALID_CNT)
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valid_done++;
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}
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if (valid_done == max_rf_path ||
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(odm_get_progressing_time(dm, start) > max_time)) {
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phydm_set_noise_data_sum(&noise_data, max_rf_path);
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break;
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}
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}
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reg_c50 = (u8)odm_get_bb_reg(dm, R_0xc50, MASKBYTE0);
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reg_c50 &= ~BIT(7);
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val_s8 = (s8)(-110 + reg_c50 + noise_data.sum[RF_PATH_A]);
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dm->noise_level.noise[RF_PATH_A] = val_s8;
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dm->noise_level.noise_all += dm->noise_level.noise[RF_PATH_A];
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if (max_rf_path == 2) {
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reg_e50 = (u8)odm_get_bb_reg(dm, R_0xe50, MASKBYTE0);
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reg_e50 &= ~BIT(7);
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val_s8 = (s8)(-110 + reg_e50 + noise_data.sum[RF_PATH_B]);
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dm->noise_level.noise[RF_PATH_B] = val_s8;
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dm->noise_level.noise_all += dm->noise_level.noise[RF_PATH_B];
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}
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dm->noise_level.noise_all /= max_rf_path;
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PHYDM_DBG(dm, DBG_ENV_MNTR,
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"noise_a = %d, noise_b = %d, noise_all = %d\n",
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dm->noise_level.noise[RF_PATH_A],
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dm->noise_level.noise[RF_PATH_B], dm->noise_level.noise_all);
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/*Step 3. Recover the Dig*/
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if (pause_dig)
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odm_pause_dig(dm, PHYDM_RESUME, PHYDM_PAUSE_LEVEL_1, igi);
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func_end = odm_get_progressing_time(dm, func_start);
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PHYDM_DBG(dm, DBG_ENV_MNTR, "end\n");
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return dm->noise_level.noise_all;
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}
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s16 odm_inband_noise_monitor_ac(struct dm_struct *dm, u8 pause_dig, u8 igi,
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u32 max_time)
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{
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s32 rxi_buf_anta, rxq_buf_anta; /*rxi_buf_antb, rxq_buf_antb;*/
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s32 value32, pwdb_A = 0, sval, noise, sum = 0;
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boolean pd_flag;
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u8 valid_cnt = 0;
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u64 start = 0, func_start = 0, func_end = 0;
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s32 val_s32 = 0;
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s16 rpt = 0;
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u8 val_u8 = 0;
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if (dm->support_ic_type & (ODM_RTL8822B | ODM_RTL8821C)) {
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rpt = phydm_idle_noise_measure_ac(dm, pause_dig, igi, max_time);
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return rpt;
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}
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if (!(dm->support_ic_type & (ODM_RTL8812 | ODM_RTL8821 | ODM_RTL8814A)))
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return 0;
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func_start = odm_get_current_time(dm);
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dm->noise_level.noise_all = 0;
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PHYDM_DBG(dm, DBG_ENV_MNTR, "%s ==>\n", __func__);
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/* step 1. Disable DIG && Set initial gain. */
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if (pause_dig)
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odm_pause_dig(dm, PHYDM_PAUSE, PHYDM_PAUSE_LEVEL_1, igi);
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/* step 3. Get noise power level */
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start = odm_get_current_time(dm);
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/* step 3. Get noise power level */
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while (1) {
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/*Set IGI=0x1C */
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odm_write_dig(dm, 0x1C);
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/*stop CK320&CK88 */
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odm_set_bb_reg(dm, R_0x8b4, BIT(6), 1);
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/*Read path-A */
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/*set debug port*/
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odm_set_bb_reg(dm, R_0x8fc, MASKDWORD, 0x200);
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/*read debug port*/
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value32 = odm_get_bb_reg(dm, R_0xfa0, MASKDWORD);
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/*rxi_buf_anta=RegFA0[19:10]*/
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rxi_buf_anta = (value32 & 0xFFC00) >> 10;
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rxq_buf_anta = value32 & 0x3FF; /*rxq_buf_anta=RegFA0[19:10]*/
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pd_flag = (boolean)((value32 & BIT(31)) >> 31);
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/*Not in packet detection period or Tx state */
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if (!pd_flag || rxi_buf_anta != 0x200) {
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/*sign conversion*/
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rxi_buf_anta = odm_sign_conversion(rxi_buf_anta, 10);
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rxq_buf_anta = odm_sign_conversion(rxq_buf_anta, 10);
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val_s32 = rxi_buf_anta * rxi_buf_anta +
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rxq_buf_anta * rxq_buf_anta;
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/*S(10,9)*S(10,9)=S(20,18)*/
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pwdb_A = odm_pwdb_conversion(val_s32, 20, 18);
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PHYDM_DBG(dm, DBG_ENV_MNTR,
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"pwdb_A= %d dB, rxi_buf_anta= 0x%x, rxq_buf_anta= 0x%x\n",
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pwdb_A, rxi_buf_anta & 0x3FF,
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rxq_buf_anta & 0x3FF);
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}
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/*Start CK320&CK88*/
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odm_set_bb_reg(dm, R_0x8b4, BIT(6), 0);
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/*@BB Reset*/
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val_u8 = odm_read_1byte(dm, 0x02) & (~BIT(0));
|
||
|
|
odm_write_1byte(dm, 0x02, val_u8);
|
||
|
|
val_u8 = odm_read_1byte(dm, 0x02) | BIT(0);
|
||
|
|
odm_write_1byte(dm, 0x02, val_u8);
|
||
|
|
/*PMAC Reset*/
|
||
|
|
val_u8 = odm_read_1byte(dm, 0xB03) & (~BIT(0));
|
||
|
|
odm_write_1byte(dm, 0xB03, val_u8);
|
||
|
|
val_u8 = odm_read_1byte(dm, 0xB03) | BIT(0);
|
||
|
|
odm_write_1byte(dm, 0xB03, val_u8);
|
||
|
|
/*@CCK Reset*/
|
||
|
|
if (odm_read_1byte(dm, 0x80B) & BIT(4)) {
|
||
|
|
val_u8 = odm_read_1byte(dm, 0x80B) & (~BIT(4));
|
||
|
|
odm_write_1byte(dm, 0x80B, val_u8);
|
||
|
|
val_u8 = odm_read_1byte(dm, 0x80B) | BIT(4);
|
||
|
|
odm_write_1byte(dm, 0x80B, val_u8);
|
||
|
|
}
|
||
|
|
|
||
|
|
sval = pwdb_A;
|
||
|
|
|
||
|
|
if ((sval < 0 && sval >= -27) && valid_cnt < VALID_CNT) {
|
||
|
|
valid_cnt++;
|
||
|
|
sum += sval;
|
||
|
|
PHYDM_DBG(dm, DBG_ENV_MNTR, "Valid sval = %d\n", sval);
|
||
|
|
PHYDM_DBG(dm, DBG_ENV_MNTR, "Sum of sval = %d,\n", sum);
|
||
|
|
if (valid_cnt >= VALID_CNT ||
|
||
|
|
(odm_get_progressing_time(dm, start) > max_time)) {
|
||
|
|
sum /= VALID_CNT;
|
||
|
|
PHYDM_DBG(dm, DBG_ENV_MNTR,
|
||
|
|
"After divided, sum = %d\n", sum);
|
||
|
|
break;
|
||
|
|
}
|
||
|
|
}
|
||
|
|
}
|
||
|
|
|
||
|
|
/*@ADC backoff is 12dB,*/
|
||
|
|
/*Ptarget=0x1C-110=-82dBm*/
|
||
|
|
noise = sum + 12 + 0x1C - 110;
|
||
|
|
|
||
|
|
/*Offset*/
|
||
|
|
noise = noise - 3;
|
||
|
|
PHYDM_DBG(dm, DBG_ENV_MNTR, "noise = %d\n", noise);
|
||
|
|
dm->noise_level.noise_all = (s16)noise;
|
||
|
|
|
||
|
|
/* step 4. Recover the Dig*/
|
||
|
|
if (pause_dig)
|
||
|
|
odm_pause_dig(dm, PHYDM_RESUME, PHYDM_PAUSE_LEVEL_1, igi);
|
||
|
|
|
||
|
|
func_end = odm_get_progressing_time(dm, func_start);
|
||
|
|
|
||
|
|
PHYDM_DBG(dm, DBG_ENV_MNTR, "%s <==\n", __func__);
|
||
|
|
|
||
|
|
return dm->noise_level.noise_all;
|
||
|
|
}
|
||
|
|
#endif
|
||
|
|
|
||
|
|
s16 odm_inband_noise_monitor(void *dm_void, u8 pause_dig, u8 igi,
|
||
|
|
u32 max_time)
|
||
|
|
{
|
||
|
|
struct dm_struct *dm = (struct dm_struct *)dm_void;
|
||
|
|
s16 val = 0;
|
||
|
|
|
||
|
|
igi = 0x32;
|
||
|
|
|
||
|
|
/* since HW ability is about +15~-35,
|
||
|
|
* we fix IGI = -60 for maximum coverage
|
||
|
|
*/
|
||
|
|
#if (ODM_IC_11AC_SERIES_SUPPORT)
|
||
|
|
if (dm->support_ic_type & ODM_IC_11AC_SERIES)
|
||
|
|
val = odm_inband_noise_monitor_ac(dm, pause_dig, igi, max_time);
|
||
|
|
#endif
|
||
|
|
|
||
|
|
#if (ODM_IC_11N_SERIES_SUPPORT)
|
||
|
|
if (dm->support_ic_type & ODM_IC_11N_SERIES)
|
||
|
|
val = odm_inband_noise_monitor_n(dm, pause_dig, igi, max_time);
|
||
|
|
#endif
|
||
|
|
|
||
|
|
return val;
|
||
|
|
}
|
||
|
|
|
||
|
|
void phydm_noisy_detection(void *dm_void)
|
||
|
|
{
|
||
|
|
struct dm_struct *dm = (struct dm_struct *)dm_void;
|
||
|
|
u32 total_fa_cnt, total_cca_cnt;
|
||
|
|
u32 score = 0, i, score_smooth;
|
||
|
|
|
||
|
|
total_cca_cnt = dm->false_alm_cnt.cnt_cca_all;
|
||
|
|
total_fa_cnt = dm->false_alm_cnt.cnt_all;
|
||
|
|
|
||
|
|
#if 0
|
||
|
|
if (total_fa_cnt * 16 >= total_cca_cnt * 14) /* @87.5 */
|
||
|
|
;
|
||
|
|
else if (total_fa_cnt * 16 >= total_cca_cnt * 12) /* @75 */
|
||
|
|
;
|
||
|
|
else if (total_fa_cnt * 16 >= total_cca_cnt * 10) /* @56.25 */
|
||
|
|
;
|
||
|
|
else if (total_fa_cnt * 16 >= total_cca_cnt * 8) /* @50 */
|
||
|
|
;
|
||
|
|
else if (total_fa_cnt * 16 >= total_cca_cnt * 7) /* @43.75 */
|
||
|
|
;
|
||
|
|
else if (total_fa_cnt * 16 >= total_cca_cnt * 6) /* @37.5 */
|
||
|
|
;
|
||
|
|
else if (total_fa_cnt * 16 >= total_cca_cnt * 5) /* @31.25% */
|
||
|
|
;
|
||
|
|
else if (total_fa_cnt * 16 >= total_cca_cnt * 4) /* @25% */
|
||
|
|
;
|
||
|
|
else if (total_fa_cnt * 16 >= total_cca_cnt * 3) /* @18.75% */
|
||
|
|
;
|
||
|
|
else if (total_fa_cnt * 16 >= total_cca_cnt * 2) /* @12.5% */
|
||
|
|
;
|
||
|
|
else if (total_fa_cnt * 16 >= total_cca_cnt * 1) /* @6.25% */
|
||
|
|
;
|
||
|
|
#endif
|
||
|
|
for (i = 0; i <= 16; i++) {
|
||
|
|
if (total_fa_cnt * 16 >= total_cca_cnt * (16 - i)) {
|
||
|
|
score = 16 - i;
|
||
|
|
break;
|
||
|
|
}
|
||
|
|
}
|
||
|
|
|
||
|
|
/* noisy_decision_smooth = noisy_decision_smooth>>1 + (score<<3)>>1; */
|
||
|
|
dm->noisy_decision_smooth = (dm->noisy_decision_smooth >> 1) +
|
||
|
|
(score << 2);
|
||
|
|
|
||
|
|
/* Round the noisy_decision_smooth: +"3" comes from (2^3)/2-1 */
|
||
|
|
if (total_cca_cnt >= 300)
|
||
|
|
score_smooth = (dm->noisy_decision_smooth + 3) >> 3;
|
||
|
|
else
|
||
|
|
score_smooth = 0;
|
||
|
|
|
||
|
|
dm->noisy_decision = (score_smooth >= 3) ? 1 : 0;
|
||
|
|
|
||
|
|
PHYDM_DBG(dm, DBG_ENV_MNTR,
|
||
|
|
"[NoisyDetection] CCA_cnt=%d,FA_cnt=%d, noisy_dec_smooth=%d, score=%d, score_smooth=%d, noisy_dec=%d\n",
|
||
|
|
total_cca_cnt, total_fa_cnt, dm->noisy_decision_smooth, score,
|
||
|
|
score_smooth, dm->noisy_decision);
|
||
|
|
}
|